AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI-written code

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI-written code

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2026-09-01 04:15:11
A new report ties together two developments that point in the same direction for advanced computing: AI is moving from assisting engineers to handling core low-level work that humans may not fully inspect line by line. Citing SemiAnalysis, the story says OpenAI engineers reviewing low-level code for the company’s in-house chip effort admitted they could not fully explain how every AI-generated assembly sequence worked, even though the code had been tested and delivered strong performance. The report also says OpenAI built a low-level kernel programming language called Gluon on top of Triton, with complex hardware instructions generated by AI. At the same time, Architect Labs has released a preprint titled "Redwood: A Frontier AI Accelerator Designed, Verified, and Deployed from Scratch in 2 Weeks by AI." According to the paper, two human engineers wrote high-level functional specifications in natural language, and an AI system produced the hardware design, verification suite, and firmware stack in two weeks without using off-the-shelf commercial accelerator IP. The paper says Redwood was deployed on AMD Xilinx Versal FPGA hardware and ran an open-source large model. It also estimates that if Redwood were converted into an ASIC on an equivalent process node, its energy efficiency in edge Physical AI and low-power settings would be 3.4 times that of Nvidia Jetson. The paper further says a model running on the first-generation Redwood chip has already joined the design of the next generation.

Architect Labs has put out a preprint that pushes the argument over AI-led chip development a lot further. The paper, Redwood: A Frontier AI Accelerator Designed, Verified, and Deployed from Scratch in 2 Weeks by AI, says two human engineers wrote high-level specs in plain language, and an AI system carried the whole thing from zero to a working hardware deployment for a large-model accelerator in two weeks.

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

At almost the same moment, the report points to SemiAnalysis saying OpenAI engineers reviewing low-level code connected to the company’s in-house chip project could no longer explain every part of AI-generated code. Put those two claims side by side and the direction looks pretty clear: AI is moving into the bottom of the stack, from accelerator kernels all the way to chip implementation.

OpenAI engineers said they could not fully explain AI-written low-level code

In the account cited by the article, a SemiAnalysis expert singled out a piece of assembly logic during an interview and asked how it coordinated hardware units. Several OpenAI engineers in the room could not walk through the logic line by line. They later admitted: "To be honest, we do not really understand what every single line is doing. But that does not matter. The AI understands it, the AI tested it, and it runs incredibly fast with explosive performance."

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

The report says that disclosure came from SemiAnalysis expert Jordan Nanos. It also says OpenAI has turned over assembly-level code generation for the most important low-level acceleration operators in its in-house chip project to AI systems. And it says the company built a low-level kernel programming language called Gluon on top of Triton, with the more complicated hardware instructions inside Gluon generated automatically by AI in a short stretch of time.

The article treats this as a break from the old assumption that code has to stay fully readable to human developers at every layer. Different standard now. In this version, the real test is whether AI can generate it, verify it, and get it to run.

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

Architect Labs says Redwood was built by two engineers and AI in two weeks

The Architect Labs paper makes the hardware side of the case. The article compares Redwood with a standard accelerator program: big teams of chip architects, verification engineers, and backend specialists; a development cycle that usually lasts 18 to 24 months from architecture and RTL to tape-out validation; and costs that can climb into the tens or even hundreds of millions of dollars.

Redwood, at least as the report describes it, took a very different route. Two human engineers wrote only the top-level functional spec in natural language. Everything below that was handled by AI. No off-the-shelf commercial accelerator IP, the article says. Even so, the system still produced the full hardware design in two weeks, including register-transfer-level code, a verification suite, and the supporting low-level firmware.

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

The paper also points to a metric engineers actually care about: how fast the system reacts when the spec changes. In the Redwood flow, once the specification is revised, AI can regenerate the design, finish verification, and push the update back onto real hardware in 48 hours. During peak development, the system reportedly merged 115 hardware changes in a single day, hit 95% module coverage, and shipped a first version with 0 Bug.

Redwood was deployed on FPGA and ran an open-source large model

The chip is called Redwood, and the article says this was not just a simulation or a paper design. It was deployed directly on AMD Xilinx Versal FPGA hardware and ran an open-source large model.

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

Based on the paper’s estimate, if Redwood were turned into an ASIC on an equivalent process node, its energy efficiency in edge Physical AI and low-power scenarios would reach 3.4 times that of Nvidia’s Jetson. The report uses that figure to argue that AI may be crushing hardware development cycles that have shaped the semiconductor sector for decades.

The paper says first-generation Redwood is already helping design the next one

The article closes by highlighting another line from the paper: a domestic open-source large model running on the first-generation Redwood chip has already started taking part in the architecture design and code generation for the next-generation chip.

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

The piece presents that as a form of recursive hardware evolution: better chips run stronger models, and those models then help design better chips. Round and round. It does not offer a deeper technical breakdown of that loop, but it pitches the idea as a closed cycle linking model capability with chip iteration speed.

How the report links Redwood to Nvidia’s CUDA moat

The article puts the OpenAI code-generation account next to the Redwood paper and says both matter for Nvidia’s long-standing CUDA advantage. The logic is simple. A huge chunk of Nvidia’s influence comes from the fact that millions of developers and hundreds of thousands of companies are tied to CUDA. If AI takes over low-level hardware-software co-optimization, developers may not need to hand-tune against complex CUDA libraries the same way anymore, because AI can generate lower-level instructions directly for a given architecture.

AI-built Redwood chip reaches hardware in two weeks as report says OpenAI engineers can no longer parse every line of AI

That said, the article itself does not give a full benchmarking framework or an independently verified comparison for the broader claim that OpenAI’s in-house chip project has beaten Nvidia on both generation speed and runtime cost. The source supports narrower points. Namely: the SemiAnalysis account about AI-written low-level code in OpenAI’s chip stack, and the Architect Labs paper’s claims about Redwood’s design flow, hardware deployment, and estimated efficiency.

Sources cited in the article

The source lists two posts from firesidealpha on X, the Architect Labs blog, and the preprint paper. The MarsBit page says the article originally came from the WeChat public account "New Intelligence," written by Aeneas David.

  • Preprint: Redwood: A Frontier AI Accelerator Designed, Verified, and Deployed from Scratch in 2 Weeks by AI
  • Preprint URL: https://arxiv.org/abs/2608.26418
  • Architect Labs blog: https://architectlabs.com/blog/redwood
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