Samsung Electro-Mechanics outlines multilayer core path for AI semiconductor packaging substrates

Samsung Electro-Mechanics outlines multilayer core path for AI semiconductor packaging substrates

N
News Editor
2026-09-10 09:12:38
Samsung Electro-Mechanics packaging division manager Kim Sang-hoon used a presentation at the KPCA Show international seminar INSIGHT 2026 on Sept. 10 to lay out a technical direction for multilayer core, or MLC, substrates as AI semiconductor packaging moves toward larger form factors and higher layer counts. He said the conventional single-layer core approach, which relies on thicker copper clad laminate sheets, becomes harder to process as the core gets thicker because internal vias and circuit fabrication grow more difficult and via size reduction faces limits. Kim said MLC structures using stacked CCL and prepreg, or even hybrid designs with two CCL sheets, can improve rigidity and routing flexibility while allowing ground or signal routing in prepreg layers. He also discussed manufacturing thresholds by bump pitch, saying volume production commonly uses pitches above 90μm, around 85μm marks an inflection point for printed fine solder ball processes, and difficulty rises sharply near 80μm, with 55–45μm nodes potentially shifting to metal bumps. Glass cores were presented as another option because of higher rigidity and lower thermal expansion, though brittle handling and microvia plating still need work.

According to ChainCatcher, Kim Sang-hoon, a manager in the packaging division at Samsung Electro-Mechanics, spoke at the KPCA Show international seminar INSIGHT 2026 held at the Songdo Convensia venue in Incheon on Sept. 10 and presented a multilayer core, or MLC, technology direction for AI semiconductor packaging substrates as they move to larger sizes and higher layer counts.

Limits of the single-layer core approach

Kim said the traditional single-layer core, or SLC, method has relied on increasing the thickness of a single copper clad laminate, or CCL, sheet. As the core becomes thicker, however, internal via and circuit processing become more difficult, and there are limits to how far via dimensions can be reduced.

MLC shifts toward stacked and hybrid structures

He said MLC is moving toward multilayer combinations of CCL and prepreg, or PPG, and in some cases hybrid structures that use two CCL sheets. That structure can improve rigidity and routing flexibility at the same time, while also allowing ground or signal routing inside the PPG layer.

Adding a bonding layer between the two CCL sheets can support the substrate more stably, though the process becomes more complex.

Process thresholds by bump pitch

Kim said bump pitches above 90μm are commonly used in mass production today. Around 85μm is the inflection point for printed fine solder ball processes, and difficulty rises noticeably near 80μm. At the 55–45μm level, the process path may shift to metal bumps.

Glass core discussed as another option

Glass core was also presented as an alternative. Kim said it offers higher rigidity and a lower coefficient of thermal expansion, which can help reduce warpage in large packages. At the same time, brittle handling and microvia plating technology still need to be addressed.

Packaging substrates are moving to larger sizes and more layers

Kim said substrates need to satisfy signal integrity, power integrity, and mechanical integrity at the same time. He added that high-performance packaging substrates are expected to move from roughly 20 layers and the 90 mm class toward the 120 mm class and even beyond 40 layers.

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