SK Hynix says foundry processes can be used in next-generation 3D DRAM development

SK Hynix says foundry processes can be used in next-generation 3D DRAM development

N
News Editor
2026-09-09 06:37:17
SK Hynix said on Sept. 9 that foundry processes can be used in the development of next-generation 3D DRAM semiconductors, outlining a technical path that brings logic manufacturing and memory design closer together. The statement followed the company’s 2026 SK Hynix Future Forum at its Supex Center in Icheon a day earlier, where Vice Presidents Kim Kyung-hoon and Son Ho-young presented key directions for 3D DRAM, including the use of logic foundry processes for DRAM peripheral circuits, maximizing data bus bandwidth, and enabling ultra-short-distance transmission. The executives said the technology will require solutions not only for design and heat issues, but also for packaging-related challenges such as fine interconnects, bonding, and process integration. Speakers at the forum also pointed to a broader industry shift, arguing that the boundaries between front-end and back-end packaging, and between foundry and memory technologies, are narrowing. Korea University professor Shin Chang-hwan said 3D DRAM is more than vertical chip stacking and proposed an AI-linked 3D integration design framework spanning materials, devices, packaging, and architecture.

According to ChainCatcher, SK Hynix said on Sept. 9 that foundry processes can be used in the development of next-generation 3D DRAM semiconductors.

The comment came a day after the company held its 2026 SK Hynix Future Forum at the Supex Center in its Icheon complex. At the event, Vice Presidents Kim Kyung-hoon and Son Ho-young presented the main technical directions for 3D DRAM, including the use of logic foundry processes for DRAM peripheral circuits, maximizing data bus bandwidth, and ultra-short-distance transmission.

What SK Hynix highlighted for 3D DRAM

3D DRAM refers to a next-generation DRAM structure that improves integration density by vertically stacking memory cells that had previously been arranged on a flat plane. The two executives said that beyond design and thermal issues, the technology will also require solutions to packaging challenges including fine interconnects, bonding, and process integration.

They added that as the boundaries between front-end and back-end packaging, and between foundry and memory technologies, move closer together, cross-domain co-optimization will become more important.

Forum remarks on industry direction

Son said 3D technology is changing the technical boundary between wafer fabrication and packaging, and that the industry needs to build optimization methods and a new collaboration system that go beyond existing domains alongside innovation in advanced packaging.

Speaking on the same theme, Korea University professor Shin Chang-hwan said 3D DRAM is not only about vertically stacking chips but also about breaking the boundary between memory and logic. As device scaling nears its limit and data movement between systems and memory increases both latency and power consumption, a shift toward 3D technology is unavoidable, he said. Shin also proposed a 3D integration design framework linking materials, devices, packaging, and architecture through artificial intelligence.

Message from the company president

In his remarks, SK Hynix President Kwak Noh-jung said the memory market used to resemble a straight road where the goal was simply to run faster, but now looks more like a constantly changing curve. He said that beyond internal capabilities, it is also important to grasp the speed and direction of changes in the external environment and adapt flexibly.

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