Intel’s next-generation PC processors may broaden their use of Taiwan Semiconductor Manufacturing Co.’s 2 nm technologies, according to an ABMedia report that cited Commercial Times. The report said Nova Lake and Razor Lake are expected to adopt a hybrid manufacturing strategy that combines Intel 18A with TSMC’s N2P and N2X, extending Intel’s foundry cooperation across the full 2 nm family.
Nova Lake may use N2P, while Razor Lake could move to N2X
According to supply-chain information cited in the report, Nova Lake, which is expected to debut early next year, will introduce bLLC, or Big Last-Level Cache, first on desktop processors. Those chips are said to use a heterogeneous process mix that combines Intel 18A and TSMC N2P. The notebook version may not follow until the later Razor Lake-HX generation.
Razor Lake is also said to be targeting TSMC N2X. The report described N2X as a high-performance extension of the N2 platform, optimized for high-frequency CPUs, AI workloads and high-performance computing. If Razor Lake ultimately enters mass production on N2X, that would show Intel and TSMC pushing their advanced-process partnership across the entire 2 nm generation.
N2X would raise manufacturing precision requirements
On the technical side, the report said the key shift in N2X lies in a full transistor-architecture transition from FinFET to Nanosheet, or gate-all-around. That change raises precision requirements for thin-film deposition, etching, cleaning and CMP, short for chemical mechanical polishing.
That increase in process complexity is one reason the expected benefits of 2 nm expansion are spreading beyond wafer fabrication and into materials and process-support suppliers.
Analyst says the TSMC plan is also about capacity positioning against AMD
The market often frames Intel’s outsourcing to TSMC as a response to unstable yields on Intel 18A. But Citrini analyst Jukan offered a different interpretation in the report. He said Intel’s capacity allocation at TSMC also carries a competitive purpose.
In his view, as long as Intel continues to expand or maintain its use of TSMC capacity, the amount of server CPU capacity AMD can secure from TSMC will be constrained. That, he said, could pressure AMD’s shipment schedule, shipment scale and broader expansion pace. He also said the market may be overestimating AMD’s future TSMC capacity allocation.
bLLC is presented as a direct answer to AMD’s 3D V-Cache
From a product standpoint, the report said Nova Lake’s use of bLLC carries a clear competitive target. By increasing processor cache capacity, bLLC is designed to reduce system-memory access latency, putting it in direct competition with AMD’s 3D V-Cache approach.
The article said Intel is still advancing its own 18A node while outsourcing part of its compute chip production to TSMC. That structure can diversify single-node risk and help secure launch timing and performance competitiveness for high-end CPUs.
2 nm ramp is lifting CMP demand, with Phoenix Silicon named as a beneficiary
As process nodes shrink to 2 nm, wafer-flatness and defect-control requirements rise sharply. The report said that is driving both the number of CMP polishing cycles and the unit price of advanced consumables higher. It named Phoenix Silicon International as one of the main beneficiaries, describing it as one of the few Taiwanese companies with independent mass-production capability for CMP polishing pads.
The report said the company’s consolidated semiconductor revenue in the first half of this year rose 25% from a year earlier, with semiconductor accounting for 66% of total revenue. Demand tied to Hard Pad products and advanced packaging remained strong, while a new Soft Pad production line is expected to enter pilot production in the third quarter and move toward mass production in the fourth quarter.
It also said Phoenix Silicon already has two products in mass production at benchmark customers, serving CoWoS and SoIC processes. Demand has climbed quickly in recent months. The company observed that AI-chip and advanced-packaging adoption is no longer limited to a single leading manufacturer, with other international customers beginning to introduce similar processes as well.
China Sand’s diamond-disk business also stands to gain
The report also pointed to China Sand as another Taiwanese supplier benefiting directly from TSMC’s advanced-node ramp. The company operates in CMP diamond disks and reclaimed wafers. Diamond disks are used to condition polishing-pad surfaces, and the report said more advanced nodes require tighter control over diamond-particle uniformity, product lifetime and defect management, giving China Sand a technical-edge advantage.
In the second quarter, China Sand posted consolidated revenue of NT$2.49 billion, up 17.9% year over year. Gross margin reached 40.1%, while earnings per share came in at NT$3.49. The report added that shipments of diamond disks related to 2 nm and 1.6 nm production are growing quickly, and the company is continuing to expand monthly capacity.
According to the report, as Intel’s next-generation processors expand their use of TSMC’s 2 nm family, China Sand’s diamond-disk business also has room to grow.