Samsung unveils CUBE 3D memory roadmap with HBM5, zHBM and zNAND-O for AI systems
Samsung Electronics used the Memory Executive Summit ahead of SEMICON Taiwan 2026 to lay out a new memory strategy called CUBE, built around a 3D vertical stacking approach. Choi Jang-seok, a vice president in the company’s memory product planning division, said the plan is meant to address rising AI demand for capacity, bandwidth and power efficiency. CUBE stands for Capacity, Utilization, Bandwidth and Efficiency, and Samsung framed it as a way to move past printed circuit board size limits by stacking chips vertically. The company also detailed a three-part roadmap covering HBM5, zHBM and zNAND-O. Samsung said HBM5 is being developed with targets of 2x the performance of HBM4E, a 20% gain in performance per watt and a 20% reduction in thermal resistance. zHBM, first shown last month at FMS 2026 in California, would place HBM directly on top of logic processors such as GPUs or CPUs. Samsung said that design aims for 8x the performance of HBM4E, up to 3x performance per watt and a 75% to 90% drop in thermal resistance. zNAND-O, aimed at large language model storage needs, is designed to stack four or eight layers of V-NAND with TSV and is scheduled to begin sampling in 2028.








