Nomura Securities, citing Japan’s Ministry of Economy, Trade and Industry Industrial Production Survey, said shipment value for packaging substrates in Japan reached JPY 27.8 billion in May, up 36% from a year earlier and above the previous record of JPY 27.3 billion set in March. The brokerage said the headline number was strong on its own, but the more important development sits below the surface: a sharpening technology contest in AI chip packaging, including possible changes to NVIDIA Rubin Ultra’s package structure and rising competition between TSMC and Intel across 2.5D, 3D and 3.5D approaches.
May data showed gains in both volume and pricing
On a volume basis, shipment area per square meter rose 10% from a year earlier in May. On pricing, the average value per square meter reached JPY 1.356 million, which was 23% above the previous peak of JPY 1.226 million recorded in April. Nomura said that combination points not only to higher demand, but also to a shift toward higher-end products.
The brokerage said demand tied to NVIDIA Rubin packaging is expected to ramp in earnest this summer, with meaningful expansion likely by around August at the latest. Related packaging substrate shipments are already climbing, according to the report, and Nomura said the current 36% growth rate should be viewed as an early stage rather than the full move.
Rubin Ultra may shift from a four-die plan to a dual-module structure
The report’s clearest technical call centered on Rubin Ultra. Nomura said the market is increasingly converging on the view that Rubin Ultra may move away from the four-die structure NVIDIA presented at its GTC conference in March and instead use a dual-module layout. Under that design, each module would combine two bare dies through 3D stacking. The report added that some views in the market also point to a similar dual-module design for the Feynman architecture.
Nomura tied the possible change to HBM4 integration. With denser routing and a larger pin count, combining HBM4 with a very large interposer exceeding 5.5 times reticle size becomes much harder. Against that backdrop, the brokerage said TSMC could adopt 3.5D packaging as a transitional step in a future roadmap, combining 3D stacking with 2.5D packaging before moving to a more aggressive level of integration once the feasibility of large interposers becomes clearer.
Intel outlined EMIB-T as a no-interposer 2.5D option
The report also pointed to a technical paper Intel presented at the Electronic Components and Technology Conference in the US. That paper covered EMIB-T, which Nomura described as a 2.5D packaging approach that does not use an interposer.
Intel said EMIB-T will complete mass-production preparation in 2026. The target package is designed to reach 8 times reticle size, with a package size of 120 by 120 millimeters, support for up to 12 HBM4 stacks and a four-die structure. Compared with earlier EMIB technology, EMIB-T adds through-silicon vias and MIM capacitors, improving voltage drop in the package power delivery network by 68% to 80%. Nomura said that matters because excessive voltage drop has been one of the main reasons EMIB saw limited adoption in AI accelerator packaging.
Nomura said Intel is using EMIB-T to build an ecosystem that can compete more directly with TSMC. Even so, the brokerage said TSMC still holds an advantage in power delivery management and thermal performance, especially with 3DFabric Alliance already bringing together multiple equipment and materials partners.
Four areas will shape the next stage of packaging competition
According to the report, the next-generation packaging race will be decided across four core areas: power delivery, thermal management, co-packaged optics, or CPO, and 3D stacking through hybrid bonding. Nomura’s conclusion was straightforward: the company that can build ecosystem strength across all four areas is more likely to control AI accelerator packaging leadership.
On the near-term outlook, the brokerage said strong growth in packaging substrate shipments should continue, with Rubin production and HBM4 adoption serving as the main drivers. Over the medium term, it said packaging substrate suppliers will be shaped by which leading customer they can enter and which technology route they align with. The gap between TSMC’s route and Intel’s route, Nomura said, will directly affect upstream material specifications, layer counts, size requirements and thermal design.
The report focused on route selection rather than stock ratings
The TechFlowPost article said the brokerage did not provide stock ratings, but it highlighted a clear takeaway: the next phase of excess returns in the packaging substrate industry will depend on whether suppliers can tie themselves to the technology path of leading customers, rather than relying only on broad industry momentum.
The article was presented as Chaoxiang Research’s summary and interpretation of a third-party brokerage report from Nomura Securities dated July 14, 2026. It added that any ratings, target prices, earnings forecasts and related judgments cited in the piece reflect the views of the brokerage analyst and the analyst’s institution, not Chaoxiang Research, and do not constitute investment advice. The article also said market risks remain and investment decisions should be made independently, and that the text should not be used as a basis for buying or selling securities.
