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Intel
2026-08-10 06:31:55

Intel EMIB-T Packaging Faces Yield Hurdles, 50% Target for 2027 Mass Production

Intel's next-generation EMIB-T advanced packaging technology is confronting serious yield challenges, according to Taiwanese media reports. Unimicron said at its July 29 earnings call that the technology is 'not yet mature,' with three EMIB-T substrate suppliers targeting just 50% yield for initial mass production by the end of 2027. Google's ninth-generation TPU is set to adopt EMIB-T for 2028 production, with MediaTek handling co-design.

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Intel EMIB-T Packaging Faces Yield Hurdles, 50% Target for 2027 Mass Production
Anthropic
2026-08-07 03:03:43

Anthropic confirms in-house chip team as it hires senior engineers for Claude hardware

Anthropic has confirmed that it is building an in-house chip team to design hardware for Claude, turning months of speculation into an official plan. Job postings on the company’s careers page show it is hiring for silicon engineer and technical program manager, silicon roles spanning front-end design, pre-silicon verification, physical design, DFT, analog and mixed-signal work, process and foundry engagement, packaging, and signal integrity. The silicon engineer position carries a salary range of $320,000 to $485,000 and specifically asks for candidates who have “shipped silicon,” pointing to a search for engineers with real tape-out and production experience. Anthropic also said it will keep a multi-chip approach, continuing to use outside hardware alongside any internal designs. The report places the move in a broader AI infrastructure shift already seen at OpenAI, Google, Meta, and reportedly Mistral, with the main attraction being lower inference costs for model-specific workloads, though any payoff would likely take years to materialize.

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Anthropic confirms in-house chip team as it hires senior engineers for Claude hardware
Samsung Elect
2026-07-15 16:39:32

Samsung Weighs Outsourcing Backend Design for Google’s 2nm TPU I/O Chip as Orders Stretch Staffing

Samsung Electronics is considering outsourcing backend design work for the I/O chip in Google’s 10th-generation TPU, code-named Icefish, as a wave of 2nm orders puts pressure on its available engineering staff. The TPU is split into a Compute processor and an I/O chip: the Compute die is expected to be made by Taiwan Semiconductor Manufacturing Co. (TSMC) on 1.4nm, while Samsung would manufacture the I/O chip on 2nm to handle data transfer between the Compute processor and high-bandwidth memory, or HBM. Google is designing the chip with MediaTek, with mass production expected as early as 2028. Potential outsourcing partners mentioned in the report include ADTechnology, Gaonchips and Alphachips. ADTechnology and Gaonchips are already tied up with large projects and are said to have limited interest in low-value backend design contracts, which typically amount to tens of billions of won, far below the value of full ASIC projects that can run into the hundreds of billions or even 1 trillion won. Alphachips, by contrast, is described as more willing to participate and sees the Google TPU program as a growth driver.

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Samsung Weighs Outsourcing Backend Design for Google’s 2nm TPU I/O Chip as Orders Stretch Staffing