Research note says China’s memory push is now split across CXMT, YMTC and XMC

Research note says China’s memory push is now split across CXMT, YMTC and XMC

N
News Editor
2026-09-07 02:27:19
A research note from Schulz_Research said China’s memory buildout is no longer centered on a single company, but on a three-part structure led by CXMT, YMTC and XMC. In the note, CXMT is described as handling DRAM wafers, while YMTC focuses on NAND and is adding DRAM at its newest plant. XMC, a foundry controlled by YMTC, is tasked with stacking products from both lines. The post linked that structure to rules Beijing has applied since late December last year. Under those rules, newly approved factories must show in procurement tenders that at least half of their equipment is sourced domestically, with exemptions granted only when no domestic option is available. Schulz_Research said YMTC’s Wuhan Phase 3 is the first advanced memory project cleared under that framework and is set to begin production later this year. The note also outlined capacity figures for CXMT, YMTC and XMC, alongside market-share estimates and product updates including DDR5, LPDDR5 and planned HBM3 production.

According to ChainCatcher, researcher Schulz_Research said China’s memory expansion is no longer a story built around a single company. The effort is now split across three players: CXMT for DRAM wafers, YMTC for NAND while adding DRAM at its newest factory, and XMC, a foundry controlled by YMTC, for stacking products from both sides.

The researcher said this division lines up with rules Beijing has enforced since late December last year. Under those rules, newly approved factories must show in procurement tenders that at least half of the equipment will be domestically sourced. Exemptions are allowed only when no domestic alternative exists.

Schulz_Research said YMTC Wuhan Phase 3 is the first advanced memory project to pass under those rules, and it is scheduled to start production later this year.

Capacity plans and factory buildout

CXMT currently operates three 300 mm DRAM fabs, each at about 100,000 wafers per month. A model cited in the note shows the company reaching 350,000 wafers by the end of 2026. If all announced projects are completed, total capacity would exceed 600,000 wafers.

YMTC’s first two Wuhan fabs have a combined capacity of 200,000 wafers. Phase 3 is projected to reach 50,000 wafers in 2027 and 100,000 wafers at full utilization. The note also said YMTC is considering two more fabs of the same scale.

XMC operates two 12-inch fabs at roughly 30,000 wafers each. It also has an HBM packaging line with capacity of about 3,000 wafers per month.

Market share and product timeline

Schulz_Research said China supplies about 10% of global DRAM bits. YMTC accounted for 14% of NAND bit shipments in the second quarter, while China consumes about 30% of global memory output.

On products, CXMT has already mass-produced DDR5 and LPDDR5. It plans to start mass production of HBM3 this year and has already sent samples to domestic AI hardware developers.

XMC, according to the note, spent two years building HBM packaging based on hybrid bonding and YMTC stacking IP, and it is still advancing TSV processes.

This article was originally published by Bit.Fan. For more cryptocurrency news and market insights, visit www.bit.fan.
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