CXMT says its sixth-generation DRAM uses 4F² as Micron dismisses some debate around the approach as a “smokescreen”

CXMT says its sixth-generation DRAM uses 4F² as Micron dismisses some debate around the approach as a “smokescreen”

N
News Editor
2026-11-02 04:18:49
Chinese memory maker ChangXin Memory Technologies, or CXMT, said in an investor relations record that its sixth-generation DRAM platform is built on a 4F² architecture, has passed engineering sample verification, and is expected to deliver its first samples to customers by the end of 2026. The disclosure was widely seen as a response to Micron’s earlier criticism of the 4F² path. Micron president and chief technology and products officer Scott DeBoer said at a technical seminar that the company will stay with 6F² and then move directly to 3D DRAM, adding that Micron has studied 4F² for more than 20 years and views some related discussion as a “smokescreen.” CXMT replied that memory-density gains are a complex system-engineering problem and that different architectures carry different trade-offs in process integration, lithography steps and thermal budget. The company also said its 4F² design uses vertical surround gate transistors and is backed by more than 300 public patent families. Samsung and SK hynix are still advancing their own 4F² work, while commentary cited by local media said CXMT’s update rattled global memory stocks because investors fear aggressive price competition from Chinese suppliers.

ChangXin Memory Technologies (CXMT) said in an investor relations record that its sixth-generation DRAM platform uses a 4F² architecture, has passed engineering sample verification, and is expected to send its first product samples to customers by the end of 2026. The update was seen as a response to Micron’s earlier criticism of the 4F² route.

CXMT says sixth-generation 4F² DRAM has cleared engineering sample verification

According to TechNews, CXMT recently said in its investor relations record that its sixth-generation DRAM technology platform is being developed on a 4F² architecture and has already passed engineering sample verification. The company expects to provide the first product samples to customers by the end of 2026.

4F² is a DRAM cell design approach. As described in the report, it changes the arrangement of memory cells and reduces the area factor from the mainstream 6 to 4, allowing more cells to fit into the same area and raising chip density.

Micron sticks with 6F² and calls some 4F² discussion a “smokescreen”

Micron (MU) president and chief technology and products officer Scott DeBoer said at a recent technical seminar that Micron will continue with 6F² technology and then move directly to 3D DRAM.

He said Micron has studied 4F² for more than 20 years and believes the technology lacks a viable scaling path. He also described some related discussion as a “smokescreen.” In Micron’s view, the key factor that determines the density limit of DRAM is the spacing and size of capacitors, not the arrangement of transistors.

CXMT says architecture choices reflect different cost structures

CXMT responded that increasing memory density is a complex system-engineering task, with word lines, bit lines and capacitors all competing for limited space. At a given process node, different architectures come with different cost considerations in process integration difficulty, the number of lithography steps and thermal budget.

The company said each wafer manufacturer makes its own choice based on technical background, existing production lines, patent positioning and capital expenditure, and that those choices deserve understanding and respect.

CXMT said its 4F² architecture uses vertical surround gate (VSG) transistor technology and is supported by more than 300 public patent families. The company plans to roll out a DDR5 RDIMM server module that combines 4F² and hybrid bonding technology around the end of the year. Whether that product moves into mass production will depend on customer validation and market demand.

Samsung and SK hynix are still pushing ahead with 4F² research

The report said Samsung presented a 16Gb 4F² prototype chip at this year’s International Solid-State Circuits Conference (ISSCC 2026). The prototype combines vertical channel transistors with wafer-level hybrid copper bonding. Samsung plans to use 4F² at the 10a, 10b and 10c process nodes, then shift to 3D DRAM at the 10d node. Samsung semiconductor chief technology officer Song Jae-hyuk also confirmed that the work is continuing.

SK hynix is also investing in 4F² development, using vertical gate technology and estimating that it can lift memory density by more than 20%. The report said SK hynix completed read-write verification of a test array in July this year and plans to present a paper on capacitor-less 4F² technology at the International Electron Devices Meeting (IEDM) in December.

CXMT update weighs on memory shares

According to Commercial Times, Wealth Magazine chairman Hsieh Chin-ho wrote on Nov. 1 that CXMT’s update shocked the market and affected memory stocks globally. He said the South Korean stock market and the Philadelphia Semiconductor Index were both under pressure to break lower, and that SK hynix shares had already moved first.

Hsieh said the market’s biggest fear is that the memory industry could run into the same kind of trouble seen in electric vehicles if Chinese suppliers cut prices aggressively in global markets. He also pointed out that CXMT’s own share price had fallen from RMB 61.8 to RMB 38.75. Market talk, he said, suggests CXMT’s yield for high-bandwidth memory HBM3E may be only 20% to 30%, indicating that the technology gap with Samsung and SK hynix still appears substantial.

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