SK hynix and SanDisk introduced the first HBF specification at the 2026 FMS Conference in Santa Clara, California. The first version targets up to 512GB of capacity and bandwidth ranging from 0.4 TB/s to 3.0 TB/s, with UCIe used as the interconnect between HBF and the processor. SanDisk also showed a test case suggesting that, in a specific AI inference setup, four GPUs paired with 4TB of HBF delivered nearly the same token output per second as eight GPUs paired with 192GB of HBM. The companies are positioning HBF as a new memory tier between HBM and conventional NAND storage. SK hynix also outlined a revised memory hierarchy that adds G0.5, G1.5 and G2.5 tiers, while SanDisk said HBF is meant to support persistent KV cache and other large inference-state data. The roadmap now points to a full HBF specification in early 2027 and samples in early 2028.

ChainFeeds Research’s PRO #155 rounds up updates across Bitcoin protocol work, Ethereum governance topics, new research, and fresh papers. The issue centers on the supply side of Ethereum block building, a proposed way to handle gas accounting under EIP-7999, and Native Ethereum Delegation (NED), a protocol-level design for staking delegation. It also includes Bitcoin quantum-recovery ideas, a Lightning Network congestion proposal, Bitcoin Core release changes, and several MEV and proof-system research notes. On the builder side, Christoph Rosenmayr and Jascha Samadi argue that the scarce asset is not block count but valuable orderflow. Their Dune-based data shows validators have earned about $1.36 billion in execution-layer rewards via MEV-Boost since early 2024, while builders kept about $404 million in builder surplus. Titan, they say, now builds around half of blocks yet captures roughly 80%–85% of surplus. The Bitcoin section includes Shinobi’s view that users who still control private keys should be able to recover BTC locked to hash-addresses without protocol-level confiscation of long-dormant coins. It also covers Bitcoin Optech’s CMTC proposal, Bitcoin Core’s new static Linux binaries, and a change that moves transaction relay throttling from per-peer queues to a global limit. On Ethereum, Anders Elowsson lays out four accounting paths for EIP-7999, while Jeff’s NED research proposes protocol-routed delegation with a worst-case concentration bound. The issue also highlights ragged multi-instance GKR for Poseidon2b, MEV articles and conference videos, and a censorship paper from Derivation Technology, Aarhus University, and Nanyang Technological University.

AI spending in semiconductors has largely been framed around GPUs, high-bandwidth memory, networking and power. This report argues that inference is widening that trade. As AI systems move from training to serving billions of queries, enterprise agents, multimodal workloads and real-time applications, the need to keep large pools of data accessible at reasonable cost is becoming more central. That is giving NAND a larger role as a capacity layer alongside HBM and DRAM, rather than leaving it as a conventional commodity storage product. Sandisk has become one of the clearest public advocates of that view. At its 2026 investor day, the company said enterprise data center flash demand could reach 1.2 ZB by 2030 and projected mid-to-high double-digit annual revenue growth from FY2028 through FY2030, with Reuters cited in the source for related expectations. The company is also developing High Bandwidth Flash, or HBF, for AI inference, while continuing to push denser QLC NAND products. At the same time, Sandisk and other storage makers are leaning more heavily on multi-year customer agreements. Reuters, as cited in the source, reported that Sandisk had signed eight long-term agreements with six customers worth about $93.9 billion in total. The article’s main conclusion is narrower than a permanent re-rating story. AI is unlikely to erase NAND cyclicality. What may change is the amplitude: stronger bit demand, better demand visibility and tighter supply discipline could make future NAND cycles less violent than in the past.

ChainFeeds Research’s PRO issue #154 pulls together several research threads across Bitcoin and Ethereum. The report highlights Fei Wu’s work on Ethereum’s post-Glamsterdam fee market, where EIP-8037 and EIP-7999 would shift gas pricing from a single-meter model to separate pricing for execution, data, and state creation. Using historical gas changes, the study models demand curves for each resource and finds different elasticities: execution is least sensitive to price, data sits in the middle, and state creation is the most sensitive. Under higher block capacity, state creation could become the new fee bottleneck. On Bitcoin, the report covers josh’s HTLC design aimed at removing reliance on mempool-based preimage monitoring and the free-relay assumption, as well as a staletip P2P message proposed by Ram and w0xlt to improve visibility into stale blocks. On Ethereum research, Hudu Yusuf questions whether stake weight truly reflects effective consensus weight and whether continuous oracle output is always safer than silence, proposing DW-BFT and a structured-silence model. The issue also includes Sidistr’s Arcanum, a compiler-layer approach for keeping source code hidden through a TEE-to-ZK roadmap, and a paper from Old Dominion University on what drives contentious Bitcoin soft forks toward orderly upgrades or lasting chain splits.

Marvell said on Aug. 4 that it has launched the Bravera SC6 SSD Controller, model MV-SF1410, aimed at the PCIe Gen6 NVMe SSD market for AI data centers, hyperscale cloud operators, and enterprise database deployments. The company said the chip is built for a shift in AI system design toward tiered memory architectures, where NVMe SSDs act as a high-capacity memory layer rather than serving only as conventional storage. According to Marvell, that setup can provide tens to hundreds of terabytes of capacity at a lower cost than GPU HBM and DRAM, helping keep GPUs utilized while reducing infrastructure costs. Bravera SC6 supports PCIe Gen6, remains backward compatible with PCIe Gen1 through Gen5, and complies with the NVMe 2.2 specification. It also features 16 NAND channels, transfer speeds of up to 3600 MT/s, support for ONFI and Toggle NAND, and compatibility with SLC, MLC, TLC, and QLC flash. Marvell said samples are expected to become available in the fourth quarter of 2026.

Goldman Sachs has reaffirmed its buy ratings on Samsung Electronics and SK Hynix even after the two stocks fell 23% and 35% over the past month. The bank’s case rests on three points: HBM pricing could reset higher in 2027, multi-year long-term agreements are locking in capacity and improving revenue visibility, and low inventory levels across suppliers are reducing the odds of a near-term downcycle. Goldman expects both companies’ blended HBM average selling prices to approach $2.9/Gb in 2027, with roughly 60% of the increase coming from repricing of comparable products and the rest from a richer mix of newer, higher-layer HBM. It also sees HBM taking a larger share of DRAM revenue for both companies through 2028. At the same time, the report says risks remain clear: AI server demand could disappoint, the final terms of long-term agreements may end up weaker than expected, capacity additions could still pressure legacy memory pricing, and China-based CXMT remains a supply-side variable over the longer run even if it is unlikely to change the tight global balance in the near to medium term.

Kioxia and Sandisk introduced their latest BiCS10 3D QLC NAND flash chip at the Future of Memory and Storage Conference on Aug. 5, describing it as the highest-density 3D NAND product that has been formally launched worldwide. The chip uses a 332-layer stack and reaches a storage density of 37 Gb/mm², with interface speeds of up to 4,800 MT/s and support for Separate Command Address, or SCA. The companies said the product is aimed at high-capacity data center SSDs. Compared with their earlier BiCS10 3D TLC NAND, which delivered storage density above 29 Gb/mm², the new QLC version pushes capacity density higher for data center storage. Industry estimates cited in the report said the chip could reach roughly 1.33 Tb under similar die size and memory cell count assumptions, though the companies have not disclosed an official capacity specification. Kioxia and Sandisk also introduced PI-LTT technology to improve high-speed signal integrity while reducing output driver power consumption. The two companies said the latest BiCS10 process could also help lower manufacturing costs after production ramps up.

Blockaid said Garden’s HTLC is currently under attack, with roughly $450,000 in USDT reported stolen across Ethereum, Base, Arbitrum and BNB Chain. Garden later said on X that it had detected abnormal activity, temporarily shut down the application, and started a full investigation. The project added that more information will be released later. The update was cited by ChainCatcher in a brief newsflash. No further details on the attack method or the affected transactions were provided in the source text.