Counterpoint says CXMT targets 11% DRAM share by 2028 as export curbs may open a different path

Counterpoint says CXMT targets 11% DRAM share by 2028 as export curbs may open a different path

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News Editor
2026-07-16 07:20:58
Counterpoint Research Director Hwang Minsung said 15% global DRAM share is the threshold for ChangXin Memory Technologies, or CXMT, to remain sustainable over the long run. He said falling below that level risks repeating the path of Taiwan DRAM makers in 2008, when they were unable to fund next-generation fab investment and saw their share slip to 3%. CXMT’s global DRAM bit shipment share is currently about 9%, with a target of 11% by 2028. According to Counterpoint, IPO proceeds are set to fund next-generation G5 process technology, HBM3 high-bandwidth memory development, and capacity expansion. The company plans to raise monthly wafer capacity from 320,000 wafers to 420,000 by 2027, then double by 2030 and triple by 2035. LPDDR5 and DDR5 are expected to make up about 75% of total output, and PC and server DRAM products have already started shipping to global customers. Counterpoint also flagged four post-IPO variables, including HBM yield and revenue ramp, overseas customer wins, possible new export controls, and whether CXMT can eventually reach 20% bit share and 15% revenue share. Neil Shah said U.S. equipment restrictions are a constraint, but may also push CXMT toward differentiated technology routes.
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BlockBeats reported on July 16 that Counterpoint Research Director Hwang Minsung said a 15% global DRAM market share is the baseline for ChangXin Memory Technologies, or CXMT, to remain viable over the long term. Below that level, he said, the company could repeat the trajectory of Taiwan DRAM makers in 2008, when they failed to cover investment for next-generation fabs and eventually fell to 3% market share.

CXMT’s global DRAM bit shipment share is currently about 9%, and the target is to lift that figure to 11% by 2028.

IPO proceeds are earmarked for G5, HBM3, and capacity growth

Counterpoint said the funds raised in the IPO will be directed to next-generation G5 process technology, research and development for HBM3 high-bandwidth memory, and capacity expansion. The company plans to increase monthly wafer capacity from the current 320,000 wafers to 420,000 by 2027, then double that level by 2030 and triple it by 2035.

In its product mix, LPDDR5 and DDR5 are expected to account for about 75% of total output. DRAM products for PCs and servers have already begun shipping to global customers.

Four issues Counterpoint is watching after the IPO

Counterpoint listed four main variables to watch after the IPO:

  • HBM mass-production yields and the pace of revenue ramp. The firm said this segment could benefit from expanded production of Huawei Ascend AI chips, with HBM revenue potential reaching about $2 billion in 2028.
  • Whether CXMT can secure large-scale procurement contracts from major global customers outside China. Supply to Apple still depends on approval.
  • Whether an escalation in trade conflict could trigger additional export controls on equipment.
  • Whether the company can, over the medium to long term, reach 20% market share by bit shipments and 15% by revenue.

Neil Shah says restrictions may also force technological divergence

Neil Shah said U.S. export restrictions on equipment for CXMT are a real constraint, but added: “Ironically, this may instead push CXMT to move ahead of traditional giants on differentiated technology paths such as vertical channel transistors and wafer-to-wafer bonding, while the incumbents often delay innovation in order to protect returns on existing equipment investments.”

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