Chinese memory chipmaker ChangXin Memory Technologies, or CXMT, has developed an HBM3 memory chip for AI processors, according to Techub News, which cited Crypto Briefing. The brief report points to a potentially meaningful shift in China’s AI hardware market if the product moves into broader use. The development was described as one that could challenge the current oligopolistic structure in the domestic market. It could also affect pricing inside China, according to the cited report. No additional technical specifications, production timeline, customer names, shipment details, or pricing data were disclosed in the source item. The report focused on the strategic implication of CXMT entering the HBM3 segment, which is closely tied to AI processor performance and memory bandwidth requirements.

HBM and DRAM prices used in AI accelerators continue to rise, according to an Aug. 31 report by Seoul Economic cited by ChainCatcher. Trade data from the Korea International Trade Association showed that DRAM export volume fell from about 681.7 million units in May to 591.74 million units in July, down 13.2%, while export value increased from $11.428 billion to $13.552 billion, up 18.5%. The average export price climbed from $16.76 to $22.9, a gain of 36.6%. The report said broader supply to customers including NVIDIA for HBM4, along with lower initial yields than HBM3E, is worsening overall DRAM tightness. Samsung Electronics’ memory division is also said to be allocating about 70% of its capacity through 2031 to long-term supply agreements, mainly with NVIDIA, Microsoft, and Google. Mega Grid Supply data put the spot price of 36GB HBM3E at $2,100, roughly 4 to 5 times long-term contract pricing, while the spot price for 16-layer HBM4, now in mass-production coordination, is about $3,500. Market forecasts cited in the report also pointed to stronger third-quarter revenue and operating profit expectations for both Samsung Electronics and SK Hynix.

SemiAnalysis's latest podcast says SK Hynix and Micron struggle with peak HBM4 speeds. SK Hynix redesigned its base chip, delaying supply to NVIDIA's Rubin platform. Samsung now holds the best HBM4 technology, flipping its supply relationship with Broadcom from an HBM3E-era disadvantage into a Jalapeño advantage.

Researchers from P Equity Research and SemiAnalysis, including Nick Doyle, discussed high-bandwidth flash, or HBF, in an X Space, outlining where the technology may fit and where major uncertainties remain. Doyle said it is still too early to judge how much HBF can narrow its cost premium versus high-bandwidth memory, or HBM, because much of the current information comes from vendor claims. He cited Sandisk’s estimate that cost per bit could be about one-eighth that of HBM, while cautioning that structural costs tied to TSVs, stacking, and pSLC mode would not disappear even if yield and testing improve with scale. Endurance remains a central unknown, he said, because higher-than-expected wear would raise overall costs. The discussion also framed HBF as a narrow-use product rather than a replacement for HBM, aimed at AI inference workloads such as low-batch, long-context mixture-of-experts models. Its target bandwidth of about 1.6 TB/s, around HBM3E class, may suit sequential reads for loading model weights and smaller local or private enterprise GPU setups. Thermal reliability and mass production were also flagged as open questions, while NAND shortages are expected to last through 2028.

High Bandwidth Memory is no longer being framed as a standalone memory problem. At Hot Chips 2026, Samsung and SK Hynix both argued that GPUs, memory, foundry processes and packaging now have to be designed as one system, but the two companies outlined sharply different routes. Samsung is trying to turn the HBM base die from a passive bridge into an active logic layer, moving the memory controller off the GPU, adding memory expansion and selective compute to the base die, and ultimately aiming for zHBM, a structure that vertically stacks DRAM directly on top of compute silicon. Samsung said that approach could free up 5% to 10% of GPU area, lift performance by 10% to 20%, cut DRAM power by about 70%, and deliver more than 2.3x the bandwidth of HBM4E. SK Hynix, by contrast, is concentrating on higher stack counts and the thermal and warpage penalties that come with them. The company said 12-high HBM4 is in production and 16-high parts are in customer validation, while hybrid bonding remains in R&D for 20-high and above. It also presented iHBM, a thermal path built into the hottest region of the stack. Micron took a third angle, arguing that the AI memory wall is widening as accelerator compute rises faster than attached-memory bandwidth, forcing increasingly difficult trade-offs across bandwidth, capacity, packaging complexity, heat and reliability.

Micron used the Hot Chips 2026 conference at Stanford University to argue that the industry’s long-running “memory wall” problem is getting worse in the AI era, not better. Ragu Sriramaneni, a specialist in HBM design architecture at Micron, said AI accelerator compute performance is improving by roughly 3x every two years, while high-bandwidth memory, or HBM, is delivering less than 2x bandwidth growth over the same period. That widening gap, Micron said, is turning memory into a central constraint on overall AI system performance. The company framed HBM as the bridge between compute and memory, highlighting how stacked DRAM and system-in-package integration help push more bandwidth into accelerator designs without a major increase in footprint. But Micron also stressed the cost of that progress. It said delivering HBM3E-class performance at the same capacity consumes about three times the silicon area of DDR5 once architecture, advanced packaging and manufacturing complexity are taken into account. The company also pointed to thermal expansion mismatch, multi-layer ECC coverage from HBM3 onward, and harder cooling demands as stacks grow taller. Micron’s broader message was architectural: the path past the memory wall will require breaking down the boundary between compute and memory through SiP, optical links and advanced packaging such as CoWoS-L and CoWoS-R.

Gigabyte said on Aug. 20 that it has launched the W775 series desktop AI supercomputer, with the flagship model using NVIDIA’s GB300 Grace Blackwell Ultra chip. The company says the system brings data-center-grade computing into an office-ready floor-standing chassis and extends its AI lineup from data centers to edge and enterprise deployments. The W775-V10-L01 can support up to 400 simultaneous users and delivers peak throughput of 9,000 tok/s. Gigabyte also raised its full-year capital expenditure forecast to NT$28 billion to NT$30 billion, up from NT$23 billion to NT$25 billion, an increase of about 20%.

SK Hynix said on Aug. 19 it would carry out a 40 trillion won share buyback and cancellation plan, the largest such move in South Korean corporate history according to the source article, while also pledging to return more than 50% of free cash flow to shareholders from 2025 to 2027. The announcement lifted SK Hynix shares by about 6% and sent the Hong Kong-listed CSOP 2x Long SK Hynix product, 07709.HK, up more than 20% during the session. The article says 07709, one of the most closely watched and best-performing equity ETPs of the past year, was listed on Binance a week earlier alongside products tied to Kuaishou, Meituan and a 2x long Samsung Electronics vehicle. Since its Binance debut, the related product’s price has climbed as much as 59%, with 24-hour trading volume topping $24.6 million as of 16:00 on Aug. 19. The report frames 07709’s rise as part of a broader convergence between crypto and traditional finance. It links the product’s popularity to SK Hynix’s position in the AI memory trade, citing a 64% global HBM market share, strong ties with Nvidia, sold-out 2026 HBM capacity, and first-quarter 2026 revenue of 52.58 trillion won and net profit of 40.35 trillion won. It also says Binance is using Asian stock perpetuals to expand its TradFi and RWA derivatives lineup.